Invent, design and implement novel programming models and runtime environments for high performance computing systems comprised of heterogeneous processors and accelerators. Implement innovative software solutions and demonstrate their effectiveness on prototype hardware. Work on software enhancements that aim to potentially improve programmer productivity. Drive the resu

Working on Adaptive Clock Generators for CPU and/or GPU applications, custom mixed signal circuits and logic design in advanced CMOS technologies using custom and semi custom design flows Design and Simulate Power Management Circuit Architectures on System level, RTL level and on Transistor level using Matlab, SystemVerilog, Verilog, Verilog A and Hspice Design, simulate,

Assist with and monitor case initiations and extensions of US non immigrant and immigrant visas (H 1B, L 1A/B, O 1, TN, E 3, F 1, PERM [EB 1A/B/C], I 140, AOS etc.). Act as a liaison with employees, managers, directors, human resources, global mobility, and talent acquisition to process visa transfers, extensions, change of status requests, and US permanent residency (gre

Perform as an auditor for internal audits of the Quality Management Systems (QMS) ISO9001 2015, generate audit reports, and facilitate external certification audits. Drive continual improvement activities with cross functional teams to assess, develop, implement, and control product, software, and IP quality processes, procedures, key process indicators, release exit crit

Design and implement database solutions to support data analytics requirements, ensuring scalability, performance, and reliability. Optimize database performance through indexing, query optimization, and other tuning techniques. Develop and maintain data models, schemas, and database documentation. Collaborate with cross functional teams to understand data requirements an

Working with Architects and reads documentation to understand features to be implemented and verified Block level test plan creation with the fully understanding of Design Specification UVM block level test bench creation and maintenance Block level test creation in directed and random constraints covering all features usage model and corner cases, for both function and p

Drive initial floorplan through pathfinding, identify critical cuts, identify routing channels, minimize whitespace with goal of minimum die size Support the floorplan through the design until tapeout Collaborate with CAD to continuously improve the floorplanning tools, flows, and methodology Dive deep into any area as needed and work across more than one program at a tim

Decode Technical documentation and deploy Software Development Kit using the documentation. Work closely with various stakeholders to take feedback on the documentation. Port High Performance computing application on ROCm using the documentation. Design, develop and deploy testing tools and automation libraries necessary to perform testing of SDK documents. Lead the adopt

Setup and support spice simulators Write custom script around the vendor tools Debug spice simulation problem Verify vendor tool accuracy Create user documentation and provide training PREFERRED EXPERIENCE Good understanding and hands on experience in all Synopsys spice simulators ( Hspice, Primesim, Finesim ). Good programming skills in Python, Perl and Tcl scripting Pro

Lead technical presentations demonstrating a good understanding of application, data, infrastructure, architecture expertise and application systems design Collaborate with infrastructure architects and be responsible for the defining designing delivering of the technical architectures, patterns, technical quality, risks, fitness for purpose and operability of technical a

Assume ownership in development and/or verification of firmware designed for an embedded microcontroller. Develop and verify firmware in C/C++ Occasional creation of utility software using C++, Perl, Python Work with HW design and verification engineers to verify firmware features Contribute to architecture of hardware, firmware and power management features PREFERRED EXP

Coordinate test and quality requirements across SoC, IP and Product teams Lead DFT design and STA optimizations to meet design Power/Performance and Area targets Integrate scan control and test compression logic construction to achieve synthesis and physical design requirement Participate in DRC, test generation and test pattern validation to achieve high test fault cover

Memory Sub system Validation Lead's responsibility includes all aspects of pre and post silicon validation from planning, execution and debug. Develop and execute test plans for HBM Functional and Electrical Validation (PVT Shmoo Characterization). The sought after candidate possess extensive knowledge of high bandwidth memory subsystem, including SoC memory architecture,

Extraordinary leadership skills and ability to inspire team members with an innate ability to see the bigger picture. Excellent debugging skills. Proven ability to drive resolution of critical problems, while under pressure. Ability to understand complex technical discussions, extract action plans, and to succinctly summarize complex details for executive reporting Abilit

Implement good DevOps practices and maintain tools and infrastructure that enable our teams to deliver high quality software reliably and efficiently. Collaborate with infrastructure architects and be responsible for the defining designing delivering of the technical architectures, patterns, technical quality, risks, fitness for purpose and operability of technical archit