Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be enabled Significant pre Silicon preparation work on our memory subsystem testbench to ensure we're ready for Silicon to arrive from the Fab Write Firmware for new features, recommend improvements to legacy features using best practices established at AMD and in the

Participate in Fortran ecosystem development by porting and testing Fortran based applications to run with various compilers targeting AMD accelerators Apply Fortran language expertise by participating in standards development, implementation, testing, and documentation Understand implications of Fortran and OpenMP standards and their implementations, and apply this knowl

Memory Sub system Validation Lead's responsibility includes all aspects of pre and post silicon validation from planning, execution and debug. Develop and execute test plans for HBM Functional and Electrical Validation (PVT Shmoo Characterization). The sought after candidate possess extensive knowledge of high bandwidth memory subsystem, including SoC memory architecture,

Work with high speed, low power digital circuit designs from definition to implementation Verification of critical high speed digital designs using both coverage driven random and directed testing techniques as well as Formal verification. Own some or all aspects of the Verification flow from initial test planning to coverage convergence and sign off closure for one or mo

Develop and advance AMD's supply chain risk management and disruption response process as leader of the Supply Chain Risk Management (SCRM) team and function as Disruption Response Project Manager during a disruption event in our supply chain. Utilize capabilities of AMD's supply chain mapping and risk management platform as process enablement tool. Identify and address p

Develop and enhance SystemVerilog / UVM based testbenches to verify new features for client, server, graphics, and semi custom interconnects. Interact with architects, RTL designers, performance engineers, and post silicon validation engineers to develop deep expertise in the Infinity Fabric architecture. Mentor junior engineers. Preferred Experience Architected and devel

Lead technical presentations demonstrating a good understanding of application, data, infrastructure, architecture expertise and application systems design Collaborate with infrastructure architects and be responsible for the defining designing delivering of the technical architectures, patterns, technical quality, risks, fitness for purpose and operability of technical a

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Lead Engineer responsible for designing, developing, debugging, verifying and/or validating firmware, software and/or hardware Provide consultation to internal and external customers regarding AMD features and programming requirements Collaborate with tools and validation team to implement actual or emulation of end customer systems Define system & platform level validati

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Train and finetune LLMs, LMMs, and image/video generation models. Improve on the state of the art LLMs, LMMs, and image/video generation models. Accelerate the training and inference speed of LLMs, LMMs, and image/video generation models. Research novel ML techniques and model architectures. Influence the direction of AMD AI platform. Publish your work at top tier venues.

Work with architects to understand the product specification, clock structure, power management, interconnect and AMD chiplet based infrastructure Interface with the architecture team, power team, IP design team, SoC integration team, Design Verification and Physical design team to identify complex technical issues/risks and optimize the implementation efficiency and cost

The candidate would be responsible for planning, designing, implementing, debugging, and optimizing compiler and SDK/Library for machine learning and 3D graphics hardware IP, as well as developing functional and stress applications. Collaborate with hardware architects and logic designers to solve functional issues, and customer support engineers to help resolve verificat

Define product features and capabilities, close architecture, and micro architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all feat

Manage a team of RTL engineers Technical leadership within an RTL team, and across other core teams Identify bottlenecks and propose new features to improve Floating Point performance. Work with performance modeling team to model and study new features. Identify power and area optimizations, supporting multiple design variants Implement new features in RTL, working with p