Cross Architecture Strategy Define optimization principles that span GPU generations Identifyarchitectural invariants and portability constraints Evaluate tradeoffs between peak performance and maintainability Kernel & Compiler Co Design Guide kernel tiling, scheduling, and memory strategies Influence compiler scheduling and code generation decisions Analyze ISA level beh

Part of AMD's AI team focused on improving the compiler infrastructure of current products and developing new groundbreaking AMD technologies in the broader compiler space Design, implement, and tune sophisticated LLVM backend passes, focusing on low level optimizations like instruction selection, register allocation, instruction scheduling, software pipelining, and memor

Develop complex/critical test content as well as monitoring/debug/root cause SW mechanisms that others can use in their plans. Be part of the team to debug issues on the platform. Be hands on with the HW/FW/SW and able to craft test/scripts/experiments to root cause complex issues that can appear at the cluster, rack, server, or GPU level. Create and execute test procedur

Become a lead debugger for the platform. Be hands on with the HW/FW/SW and able to root cause complex issues that can appear at the cluster, rack, server, or GPU level. Create and execute test procedures to validate the design of various system components on the next generation of machine learning architectures. This includes all components of servers including CPU/GPU/Me

Bring up and validate silicon photonic devices and optical engines including modulators, photodetectors, wavelengthdivision multiplexed channels, and optical interfaces Perform electrooptical characterization optical power, extinction ratio, insertion loss, BER, eye diagrams, jitter, and sensitivity Validate Tx/Rx optical paths across temperature, voltage, and process cor

Early architectural/performance exploration through micro architectural definition and design. Optimize the design to meet power, performance, area and timing requirements. Write easily readable and synthesizable Verilog RTL. Run some unit level testing to deliver quality code to the Design Verification Team. Create assertions to improve coverage and cover points to analy

Content Strategy & Editorial Leadership Own the client content strategy across product marketing, defining narrative frameworks, messaging standards, and quality bars. Serve as the central editorial authority for product marketing collateral, reviewing and shaping Product launch messaging and narratives Sales decks and pitch materials Customer facing collateral (datasheet

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next generation computing experiences from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinar

Driving technical innovation to improve AMD's capabilities across validation, including tool and script development, technical and procedural methodology enhancement, and various internal and cross functional technical initiatives Debugging issues found during the process, bring up, validation, and production phases of SOC programs Working with multiple teams, and trackin

Provide technical leadership for the architecture and development of AMD's NPU compiler stack. Design advanced IR transformations, graphlevel optimizations, and hardwareaware fusion passes. Guide system wide performance strategies using deep knowledge of HW architecture constraints (memory, parallelism, dataflows). Collaborate with hardware architects, runtime teams, and

Analyze largescale silicon test and yield data across NPI and production phases. Extract relevant data from broad, catchall test files and databases, often requiring custom parsing and validation. Drive yield improvement plans and yield loss rootcause analysis, identifying actionable drivers. Define, evaluate, and validate ATE test points using statistical methods, includ

Drive pre silicon planning and influence key decisions on product power and performance. Drive critical post silicon testing methodology and implementation decisions. Communicate product life cycle status to management or executive staff. Perform management reviews to measure the meeting of objectives. Define and lead key product deliverables/schedules and drive multi fun

Lead the development and execution of the product roadmap for networking infrastructure, focusing on scalability, reliability, and performance, especially in relation to GPU cluster environments. Drive the design and implementation of cutting edge network solutions, ensuring optimal performance for HPC and GPU based applications. Work closely with hardware and software en

Optimize Deep Learning Frameworks Enhance and optimize frameworks like PyTorch, vLLM, SGLang for AMD GPUs in open source repositories. Develop GPU Kernels Create and optimize GPU kernels to maximize performance for specific AI operations. Develop & Optimize Models Design and optimize deep learning models using quantization specifically for AMD GPU performance. Collaborate

Optimize Deep Learning Frameworks Enhance and optimize frameworks like PyTorch, vLLM, SGLang for AMD GPUs in open source repositories. Develop GPU Kernels Create and optimize GPU kernels to maximize performance for specific AI operations. Develop & Optimize Models Design and optimize deep learning models using quantization specifically for AMD GPU performance. Collaborate