GPU Kernel Optimization Develop and optimize low level GPU kernels to accelerate inference and training of large machine learning models. Maximize the computational efficiency and reduce execution time while ensuring model accuracy. Multi GPU and Multi Node Optimization Design and implement strategies for distributed model training and inference across multiple GPUs and n

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Creates and enables efficient geographically agnostic processes and tools to optimize quality and consistency of Cadence CAD designs. Proactively explores, pathfinds, and supports state of the art Cadence PCB design and EDA tools and processes to support our internal teams Capable of debugging and solving technical Cadence PCB design and working directly with Cadence for

Architect, design, and implement high performance system software for AIE enabled devices that accelerates ML workloads. Work with technical leads and others to converge on the design of runtime software components. Collaborate with cross functional engineering teams to implement and debug software stack on AIE enabled device as required. PREFERRED EXPERIENCE Strong softw

Contribute to the definition of circuit architecture and to the design implementation of various state of the art, low power blocks, and area efficient circuits for DDR,LPDDR,GDDR PHYs Develop models for link level statistical performance simulation of the PHY (Link Training, PHY, DRAM, DB/RCD, DFE training, Transmit Equalization) and application of the same to the develo

Lead the design and implementation of SEV SNP live migration for Linux. Identifying bottlenecks and optimizations & features to advantage EPYC CPUs. Drive features and functionality to our partner technical teams including the Linux kernel, virtualization, and security communities. Support the solutions offered by our partner companies. Review code, build unit tests, and

Defines, plans and drives projects and program plans based on management and senior technical guidance Possesses a thorough knowledge of the principles ofproject management and can apply them effectively on small to large size projects Has responsibility for projects or processes of significant technical importance and for results that cross engineering project areas Init

Work with architects to understand the product specification and power management features to build an efficient customer focused solution Translate technical knowledge and integrate these features accurately into our design Interface with IP design team, SoC integration team, DFX, Design Verification and Physical design team to analyze and optimize the power management i

Enable C++ based diagnostics to be run as patterns on Automated Test Equipment (ATE) Run and debug simulations based on these patterns for hardware developed in Verilog Debug waveforms in Verdi Run emulation on FPGA platforms for these patterns Collaborate closely with design and diagnostics teams to understand and adapt C++ diagnostic algorithms for effective ATE testing

participating in and driving large design blocks from early design stage to tapeout. Work responsibilities include synthesizing extremely high speed designs, following through with Place and Route and analyzing design results, and making changes to the RTL code as needed. Work involves daily interaction with other physical designers as well as with RTL/Logic designers PRE

Work with AMD's architecture specialists to improve future products Apply a data minded approach to target optimization efforts Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture Design and develop new groundbreaking AMD technologies Participating in new ASIC and hardware bring up s Debugging /fix existing i

Develop and maintain ML serving solutions on top of SHARK/IREE compiler and runtime Enable various ML model parallelism techniques on top of SHARK/IREE Analyze whol e system performance, identify bottlenecks, propose ideas to improve, prototype and productionize solutions Follow industry directions and adopt emerging technologies in model serving PREFERRED EXPERIENCE Fami

Contribute to the design and implementation of AMD'S GPU kernel generator used in a variety of high performance machine learning libraries and frameworks Analyze the performance of GPU kernels and provide insight on optimization paths Develop optimization and analysis passes on graph representations of GPU kernels Communicate and collaborate with key technical experts acr

Demand Projection and Pipeline Alignment Collaborate with sales teams to forecast customer demand accurately. Conduct regular meetings to discuss projected demand and latest customer orders. Work closely with Business Development teams to understand pipeline and align on expected customer demand Monthly Operating Forecast (MOF) Management Partner with stakeholders, includ

As an AI ML System Architect, you will be responsible for analyzing AI models, quantizing models for various data types for efficiency/ latency/ throughput tradeoffs and proposing implementation on AMDs Adaptive SoC platform for embedded applications. The job also requires the candidate to have the capability to generate test vectors for the AI Models for improvement of t