Own major portions of the design and implementation of blocks to meet functional, timing, area and power requirements Collaborate with architects and hardware engineers to understand the new design features to be implemented Guide and review verification for these blocks Design and implement logic functions that enable efficient test and debug Participate in silicon bring

Work with Global GTM and regional sales teams to develop and implement a channel strategy, including distributors, VARs, and GSIs Define and drive Product Marketing, Regional Marketing, and Corporate Marketing to deliver marketing and sales assets and campaigned needed for channel enablement Leads sales play enablement for the channel Develop and execute through ISV and V

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Develop and execute a strategic roadmap for server firmware quality assurance, aligning with organizational goals and objectives. Cultivate a devious tester mindset, capable of thinking creatively to identify potential vulnerabilities and weaknesses in firmware design and functionality. Define and implement robust quality assurance processes, methodologies, and best pract

Develop technical test plans to support platform based APU silicon bring up and the validation execution of DDR5 and LPDDR5x memory components in partnership with memory controller and PHY designers, BIOS developers, platform design engineers and external partners. Enable SOC DDR5 and LPDDR5x memory features for new client APU's as part of a technical platform enablement

You will drive the design and development of the Tk language and compiler infrastructure Implement compiler optimizations for generating high performance kernels on AMD GPUs, CPUs and IPUs Implement state of the art ML kernels in Tk (such as paged attention, etc.) and optimize them Participate in design discussions and develop roadmap for future work Engage with the commu

Develop and deliver timing methodology flow for next generation designs. Release high quality flows and provide support to design teams on critical issues. Evaluate and qualify capabilities of new EDA tools and collaboratively develop new features. Provide technical leadership, mentoring and customer support in a global multi cultural work environment. PREFERRED EXPERIENC

Refine our L1/L2/L3 processes for supporting the successful bring up of HPC and AI frameworks and models in partnership with our ODMs/OEMs in support of our end clients. Provide L2 software support and maintenance to all Instinct products through end of life. Oversee the development and application of tools and new methodologies required to support clients adopting our In

Organize meetings and lead discussions between AMD and customers executives. Identify relevant agenda topics, develop and present content to executives. Implement a robust and comprehensive process to track all customer programs/designs across your accounts including objectives, schedules, key milestones and checkpoints, risks and issues. Drive execution of all programs a

Define and specify micro architecture of AI Engine building blocks and necessary infrastructure based on architecture, PPA, DFT, Functional Safety requirements RTL design and debug of complex blocks in Verilog / System Verilog Analyze design metrics and make implementation choices to optimize PPA Work with verification and physical design teams to achieve high quality des

Work with the Data Fabric architects and the chip floorplanning team to develop a custom Data Fabric topology Synthesize Data Fabric IP using Synopsys tools and work with the micro architects to ensure the design components meet the project's area, power, and performance goals Provide feedback to RTL team to resolve timing, power, area, LINT, DFT, and cross clock domain i

Responsible for designing, developing, debugging, verifying and/or validating firmware/software Collaborate with architects, hardware engineers, and firmware engineers to understand the new features/algorithms to be coded Drive the feature implementation end to end; proactively read the specs, attending to details, closing the opens to do a thorough job Code with high qua

Executive level communications on status, problem resolutions, and decisions required is of utmost importance given the fast paced environment. Individual will partner closely with Director of the Server System Validation teams (as well as all other product development and business peers) and must be able to lead engineers as One AMD Mentor and lead a team of system level

D riving technical innovation to improve AMD's capabilities a cross validation, including tool and script development, technical and procedural methodology enhancement, and various internal and cross functional technical initiatives Drive the development of CPU validation strategies and test plans that ensures adequate coverage Ensure the team and labs are ready for silic

Technically lead a cross functional engineering teams responsible for system and hardware development of AI acceleration based systems from the product definition to products. This included physical design of multilevel boards including DFM (Design for Manufacturing), power regulation, board bring up qualification and debug, thermal, signal integrity, EMI (Electro Magneti