Define product features and capabilities, close architecture, and micro architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all feat

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next generation computing experiences from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinar

Work closely with internal architecture, engineering teams to enable the requirements that will deliver the best experience on AMD CPUs. Use your strong product sense to align the product and platform capabilities with what matters to our customers (the value proposition). Build and drive deep engagements with strategic customers and internal teams to define and document

Conduct research and development of novel algorithms for logic synthesis and optimization Deliver multi fold improvements in quality of results (QOR), runtime, and memory. Evaluate new FPGA architecture features and their impact on existing implementation tools. Modernize and extend mature C++ codebases by retiring legacy implementations and introducing new techniques Sta

Work with senior verification engineers and create test plans for complex IP designs. Design testbenches in System Verilog and UVM to complete verification of the design in an efficient manner. Create and enhance constrained random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools

Provide systems engineering and post silicon support for DDR/LPDDR/GDDR Memory interface IP. Lead Pre Silicon engagement preparing test plans, reviewing simulation results, preparing tools, automation scripts and BIOS readiness for post Si validation working closely with PHY/controller design, SI/PI, Simulation, Firmware and BIOS teams. Lead new products bring up support

Drive architecture of key IPs including their PPA tradeoffs, Interconnect, and integration into SoC Define and optimize SoC control bus protocols, reset flows, clocking strategies, and power domains. Drive early stage architectural analysis, modeling, and specification development. Contribute to architectural innovation for Adaptive SoC Use cases in AI, GPU, video, and IO

1. Architect Verification Driven Agentic Workflows Multi Agent Collaboration Implement strategies involving specialized roles (e.g., infra Architect, Debug Coder, QA Validator) to ensure high quality engineering task output and minimize hallucinations. Domain Knowledge Centric RAG Build high precision retrieval systems using LangChain (LCEL) to index massive repositories,

Contribute to products, flows, and methodologies that support extensive and efficient use of formal verification across AMD Drive or support projects that apply formal verification, tools, and techniques to improve hardware design and implementation quality Identify the best solutions available inside and outside of the company; evaluate and facilitate the deployment of t

Improve AMO GPU performance on open source repositories for LLM workloads such as vLLM and SGLang. Co optimize Al workloads on current AMO GPUs by analyzing the bottlenecks and mitigating them at the kernel level. Integrate AMO software stacks (RoCm, ATen) intoopen sourceframeworks such as Pytorch, JAX, and Triton. Build strong technical relationships with peers and partn

Develop and implement AMD's Data Center st rategy to grow our partnerships and associated business with GSIs Build deep relationships with GSI executives in pursuit of growing mutual business as related to delivering enablement scale Drive a comprehensive enablement plan with GSI partners, including sales and pre sales training, program optimization, and alignment of AMD

Define and implement strategies to grow AMD's server business in the Semiconductor/EDA vertical through a solutions based approach spanning CPU, GPU, and software. Conduct competitive, market, and partner capability assessments to shape actionable vertical expansion plans, and build the frameworks (market analysis, vendor evaluation, business case, partnership execution)

Own the executive calendar; Prioritize appointments as necessary; Coordinate major offsite meetings and executive travel Arrange domestic and international travel schedule and reservations; Prepare expense reports and ensure submission in a timely fashion Interface with members of the management team, customers, and other executive visitors; Redirect inquiries and problem

Responsible for firmware development and feature enablement in the Infinity Fabric interconnect across all AMD products, including design, documentation, unit testing and debug for pre and post silicon support. Enhancing python based tools that process large amounts of complex data to produce hardware initialization binary. Develop tools and infrastructure that help in th

Manage and improve business processes for the Cores Post Silicon Validation using state of the art AI tools Coordinate with stakeholders to ensure team preparation for important deadlines, program milestones, pre reads, and executive meetings. Moderate process forums, capture minutes and actions, and follow up with action item owners to ensure closed loop accountability.