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About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Optical PHY (CE-OPHY) team designs ultra high-speed and optical transceivers for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the company's products being first to market in many of key areas, developing the most advanced chips and subsystems solutions to address the ever-increasing demand of higher data rates driven by video-on demand, gaming and other real time data streams. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity.What You Can Expect
We are seeking a Senior Principal level analog design engineer to contribute to the development and productization of advancedultra high-speed broadband transceivers.
What We're Looking For
MS/PhD in Electrical Engineering with 12+ years of relevant industry experience.
Solid experience in following:
- Using EDA CAD tools
- Supervising Analog Custom Layout
- Experience in measuring IC performance and debug of design to correlate simulations to measurements
Deep understanding of CMOS analog design fundamental, including:
- Detailed transistor level design
- Device physics
- Control/Feedback loop stability analysis
- Strong team-player with solid communication skills.
Willingness to share knowledge with other team members.
Serves as a mentor to less experienced engineers.
Candidate must also have proven experience in IC design flow from initial
specification to final implementation (including layout) and lab measurement.
Direct project experience in at least one of the following areas a plus:
- ADC-DAC design
- PLL or clock circuit design
- RF/High-Speed (10GHz+)
Knowledge & experience in Verilog coding a plus.
Project experience in using advance CMOS nodes a plus.
Experience in Package-System integration issues desired.
Expected Base Pay Range (USD)
170,100 - 251,750, $ per annumThe successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .