To perform this job successfully, an individual must be able to perform each essential duty listed below satisfactorily. Develop, implement and manage all UM processes for continuous and sustained compliance with all applicable state, federal and NCQA regulatory requirements, SCFHP policies and procedures and general business requirements for all lines of business. Develo

Job Location San Jose (10678) San Jose, CA   Salary Range $23.00 $24.50 Hourly Description Overview Founded in 1973, Inter Con Security Systems, Inc. is a leading US owned security company, providing integrated security solutions to government and commercial customers on four continents. Inter Con remains under family ownership and control and operates as the industry

This position's primary responsibility to service in store guests with a selling strategy that follows the guidelines of our Guest Engagement Model, while emphasizing the Interior Design. Will service any influx of scheduled design appointments made in house, through our Commercial business channels, or via appointment setting technology by analyzing collected information

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Drive formal verification for the block and write formal properties andassertions to verify the design Coordinate with RTL engineers to implement logic design for better clock gating and verify the various aspects of the design Write tests, sequences, and testbench components in SystemVerilog and UVM along with formal to achieve verification of the design Responsible for

Collaborate with internal customers and teams to gather requirements and design solutions using the ServiceNow platform. These solutions may interface with other applications using Integration Hub or other technologies. Identify and design solutions to simplify and/or automate new or existing business processes. Implement and maintain security architecture that aligns wit

We are looking for a Systems Design Engineer to join the System level Test team in San Jose. You will be involved in the silicon life cycle from testing of emulated next generation RTL through to silicon validation. You will have a view of the full system but also will become an expert in certain IP down to the register level. We are looking for someone who can span the r

Validate and characterize AMD's SerDes PHY functionality and performance against design targets, product requirements, datasheet and industry standards. Working closely with internal and/or external teams to troubleshoot issues and determine the root cause. Feedback to designers and architects for design improvements. Collaborate with architects, design engineers, and app

Provide senior thought leadership and significant technical contributions in design, implementation, and support of AMD's global network infrastructure. Bring passion, enthusiasm and dedication for a metrics driven approach towards Network uptime, resiliency, performance, low latency, and end user satisfaction. Provide in depth technical expertise to identify and evaluate

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Estimate the time required to write the new feature tests and any required changes to the test environment Build t

Architecting, designing, and implementing next generation deployment architecture and automation and observability solutions for network provisioning, configuration management, monitoring and troubleshooting. Lead and implement various software projects, that will help operate AMD's global network in an efficient, resilient and performant manner. Bring passion, enthusiasm

Perform RTL design, including micro architecture definition of the digital portions of the IP and drive for optimum power, performance, and area. Work closely with functional verification team to meet coverage and quality standards. Setup CDC checks, analyze and resolve CDC issues in the design. Work closely with methodology and PD teams to implement RTL design into GDSII

Inspire a Love of Learning | Support Schools | Give Parents Peace of Mind Right At School has been providing safe, fun, and meaningful extended day enrichment programs for more than a decade, and today we serve more than 35,000 students in 17 states across the country. Our after school, before school, and break camp programs give students a place to learn, play, grow, and

Power Amplifier/RF IC Design Engineer is responsible for design and development of RFICs for mobile handset applications, including Class A, AB/E/F, Doherty, and other high efficiency advanced topologies. Designs will be Multi Chip Modules, implemented in GaAs (HBT/pHEMT) as well as various IPD processes. Individual should have familiarity in RF & 3D EM modeling of RFICs

Monitors developments and trends within the supply base and ensures ASML is prepared to react appropriately Drives supplier selection activities by leading one or more Sourcing Teams Negotiates Long Term Supply Agreements (LTSA), NPI Agreements, and associated addenda Monitors contractual compliance of the supplier as well as ASML Drives continuous cost and lead time redu