At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, store, process and secure the world's data with semiconductor solutions designed for our customers' current needs and future ambitions. Through a process of deep collaboration and transparency, we're ultimately changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform-for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It's what's keeping the world connected, businesses running, and information flowing. If you're ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

Job Responsibilities:

The IP program Manager will be part of Central Engineering's program management team responsible for the IP development and delivery for Marvell's products and ASIC businesses, giving the opportunity to contribute to the successes of numerous Marvell programs

The successful candidate will understand the SoC IP needs and develop plans to deliver and support the IP from conception through to program Mass Production Release (MPR).The successful candidate will have both depth and breadth in the related IP engineering that involve cross functional organizations, in the forms of analog, logic, design for test, layout, timing, validation, PnR, etc.Good understanding of technologies and IP development process and methodology are required. Excellent interpersonal skills and communication skills are a must.

Responsibilities:

• Overall responsibility for program management of IP development & delivery to Marvell product business units
• Drive closure of IP specs & requirements
• Demonstrated strong cross-functional leadership to chair weekly cross functional meetings assessing status, milestones, and completeness of plans with regular program updates to Marvell Executive stakeholders
• Support Marvell's Program Management Process
• Matrixed leadership of engineering program managers distributed across the engineering organization
• Execute lesson's learned, risk management, and enforce agreed to processes
• Responsibility for the successful outcome of IP development & delivery

Requirements:

• BS in Electrical Engineering and MSEE preferred
• Bachelor's degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience, OR Master's degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5 -10 years of experience.
• 6+ years of experience as an Engineering Project Manager in the Semiconductor industry preferred
• 6+ years of experience as a mixed signal IP designer
• Knowledge of SoC/IC design flow for advanced process technologies and process flows and methodologies in Silicon Development
• Excellent verbal and written communication and presentation skills
• Demonstrated ability to partner with technical managers to drive projects to completion
• Demonstrated effective partnerships and relationships with key stakeholders
• Excellent leadership skills
• Must have a broad background in ASIC or other Microelectronics development

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With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We'll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.

Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.